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ME1000:  Cache Optimizing Real-Time, Multicore Systems
INTERMEDIATE LEVEL SESSION
Day 05/22/13
Time 11:15-11:45
Location Grand Ballroom F
Company Rockwell Automation
Abstract Unlike real-time systems of the past, most modern, real-time, multicore systems utilize one or more levels of data and instruction cache. The secret of speed in these systems is Cache Efficiency. If code and data can be kept in the cache, system performance will be optimal. For multicore systems the caching issues are more complex. Data may need to be shared amongst the L1 cache associated with each core. This paper will explore how to optimize real-time software to best utilize caches, multicore and multilevel caching issues, and system design guidelines. Specific topics include, cache architecture, cache coherency and snooping cache thrashing, data structures optimizations, code optimizations. Concrete optimizations examples will be given along with pit-falls.

Speaker

 

Jonathan Bradford

Jonathan Bradford is a Senior Project Engineer at Rockwell Automation and has 27 years of experience with real-time systems. He specializes in optimizing the interactions of firmware and hardware to produce real-time systems with optimal performance. Jonathan graduated summa cum laude from the University of Michigan’s College of Engineering and holds 5 patents in the areas of real-time systems, simulation, and sensors. Other papers include, “High-Level, Model Based ASIC Verification”, presented at the ISA conference on September 12, 2001.